Selahattin Sayil, Ph.D.
Professor
I teach various courses in Microelectronics/VLSI field pertaining to low power design and reliability of complex digital systems. I also offer independent study courses to those students who are interested in research and who have taken my courses before.
The power consumption is one of the most important challenges of high-performance chips and portable devices. This introductory course covers the design of low-power circuitry in deep submicron technologies. The course also covers soft errors in VLSI and studies the reliability of low power circuits.
Topics studied include: CMOS VLSI Design, short channel effects, fundamentals of power dissipation in microelectronic devices, leakage or static power, leakage mechanisms (sub-threshold leakage, gate leakage etc.), CMOS leakage reduction techniques such as transistor stacking, input vector control, VTCMOS, DTMOS schemes; interconnect design, Synopsys HSpice simulation, Soft errors in advanced computer systems, soft error mechanisms, error rate, soft error mitigation methodologies, and impact of Power optimizations on chip reliability
This course deals with issues and models to design low-power VLSI circuits, fundamentals overcome these difficulties
This course provides an introduction to the design and analysis of digital CMOS VLSI circuits and systems. Afterwards, advanced concepts in CMOS-based digital system design are studied.
Topics studied are: CMOS Design principles, gate sizing, and transmission gate logic design, interconnect parameters and impact on chip performance, delay optimization techniques such as buffer insertion and cascade of buffers. Clock skew and power grid challenges and its impact on performance, VLSI Testing basics and challenges, fault modeling and test generation, stuck at faults, transistor stuck on/open faults, controllability and observability measures, testability techniques built-in self-testing, pseudorandom test procedures- used by industry, IDDQ testing, alternative contactless testing methodologies such as IBM Picosecond Light emission testing.
The course introduces numerous industry-grade computer-aided design (CAD) tools used to facilitate the design, verification, and analysis of complex VLSI circuits and systems. The course begins with an introduction to CMOS layout and interconnect design. Industry standard Synopsys Hspice software, Custom Explorer and Microwind Layout and Verification tools are used. The course then focuses on Verilog Programming. A broad coverage of Verilog HDL from a practical design perspective is given.
Topics studied include: CMOS Design Basics, Fabrication Process, CMOS Layout Design using Microwind CMOS layout and verification software, Parasitic extraction, Timing simulation, Synopsys HSpice Tutorial and Simulation, VLSI Interconnect design, interconnect modeling for performance analysis and noise analysis, Buffer insertion, Clock and Power Grid Design, Verilog Programming, validating designs using Verilog test bench, full coverage of Gate-level modeling, Dataflow, behavioral and switch level modeling, timing and Logic synthesis methodologies, Tasks and Functions, Verilog UDPs (User-Defined Primitives), Logic Synthesis.